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A 0.0129 mm2 DPLL with 1.62.0 ps RMS period jitter and 0.25-to-2.7 GHz tunable DCO frequency range in 55-nm CMOS

Research Authors
Luo, Zhihong; Wang, Guoxing; Yousef, Khalil; Lau, Benjamin; Lian, Yong; Heng, Chun-Huat
Research Member
Research Department
Research Year
2018
Research Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Research Publisher
NULL
Research Vol
Vol. 65 - No. 12
Research Rank
1
Research_Pages
p 1844-1848
Research Website
NULL
Research Abstract

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