This paper presents the design of a CMOS low noise amplifier (LNA) with minimized group delay variations and optimized noise performance for ultra-wideband (UWB) applications. The proposed LNA employs a common source based current reuse topology. Through this configuration gain flatness of 12.25± 0.25 with noise figure (NF) less than 3.8 dB are achieved. This LNA achieves group delay variation of ±25 ps using the standard 0.18 µm CMOS technology. Weak Capacitive-Resistive shunt feedback technique is implemented across the input stage for wideband input matching. Series peaking with output resistive termination are adopted for group delay variations optimization. This UWB LNA has a measured 1dB compression point (P1dB) and an input third-order inter-modulation point (IIP3) of -7.0 dBm and 2.5 dBm respectively at 5.5 GHz. The implemented UWB LNA chip area is only 560 µm x 590 µm.